Trusted Wafer Foundry
Since 1987, the Microcircuit Emulation Center’s Wafer Foundry located in Princeton, NJ has maintained semiconductor processing for a diverse array of technologies and provides on-demand manufacturing of microcircuits for the DLA Generalized Emulation of Microcircuits (GEM) and Advanced Microcircuit Emulation (AME) Programs. Our Foundry is accredited as a Department of Defense (DoD) Trusted supplier and is audited for conformance to MIL-STD-883 and MIL-PRF-38535. The Wafer Foundry occupies approximately 25,000 square feet and has ISO 4 (Class 10) and ISO 5 (Class 100) cleanrooms. Currently configured to process six-inch silicon and silicon-on-insulator (SOI) substrates, the facility utilizes advanced mainstream semiconductor process equipment systems which are maintained by vendor-trained staff and service contracts. The Wafer Foundry retains technical self-sufficiency, with the capability to perform all processing steps in-house, including ion implantation, chemical mechanical polishing, wet cleans, photolithography, dry and wet etching,
thermal treatments, chemical vapor deposition, physical vapor deposition, in-line metrology, and wafer testing. Process technologies range within the 3.0 μm to 0.35 μm technology nodes, and include Analog, BiCMOS, CMOS, and Bipolar.
|Technology Node||3.0 μm||1.5 μm||1.2 μm||0.8 μm||0.5 μm||0.35 μm|
|Microcircuit Applications||4000/B series, HiNIL, OpAmps||TTL, DTL, UHD, ROM/SRAM, High Speed CMOS, PLAs, PALs, ROM||Digital Logic, Small Microprocessor, ASICs, TTL, PLAs, PALs, ROM, RadHard||Digital Logic, ASICs, FPGAs, ROM, N-Sub MOS, Schottky, 18K/64K SRAM , ECL 10K||Complex Logic, ASICs, FPGAs, ROM, FCT, FAST||Complex Logic, ASICs, FPGAs, 256K SRAM, Microprocessor, Microcontroller|
In-House Wafer Processing Capabilities
|LPCVD, Si3N4, TEOS, Poly, Wet/Dry/RH, Oxides||Pt,Ti,TiN,AlCu, Gap Fill SiO2, Si3N4, BPSG, PSG,BSG, Epitaxial Silicon||DUV Stepper, I-Line Stepper||B, BF2,P,As, (20-200KV), Sb,Ge & Off Angle||Dry & Wet, Metal, Poly, Oxide Silicon, Nitride, Trench, Chemical Polishing||Wafer Inspection, Defect Analysis, Yield Improvement|
- Class 10 and 100 cleanrooms
- 25,000 sq ft wafer foundry
- Computerized WIP tracking system
- Automated lot tracking and history
- SPC manufacturing process
- Fully documented and audited procedures
- Dedicated, experienced and skilled operational maintenance, process development, and integration teams
- Certified operations personnel
- Maintenance & facilities activities supported by on-site team and service contracts
- QML, ITAR and trusted
The Wafer Foundry continuously maintains several process technologies and absorbs newly developed technologies that transition from the AME development program to the GEM production program. We execute split manufacturing which involves the creation of base or front-end-of-line (FEOL) processed wafers, where wafers are completed through the majority of the manufacturing flow and held in inventory. For each new request, a wafer is removed from inventory and processed through a personalization or back-end-of-line (BEOL) process to create the final microcircuit. This approach allows us to execute low-volume, high-product mix manufacturing to support customer requirements.
As Emulation technology advances and incorporates increasing technological diversity and greater reliability, we continually integrate state-of-the-art process equipment and procedural improvements in all maintained and developmental technologies. This is critical as it ensures equipment used to support all processing capabilities provides the highest uptime with minimal processing cycle time. These continuing improvements enable the Wafer Foundry to meet the requirements to support low-volume and high-product mix on-demand manufacturing with high yields.