Wafer Acceptance Testing (WAT) and Wafer Level Reliability (WLR)
As a MIL-PRF-38535 QML certified process, Wafer Acceptance Testing (WAT) of parametric devices is used to validate that every wafer conforms to the required limits of transistor characteristics and other critical device electrical parameters. This test is used to assure the wafer was processed correctly. If the wafer meets all device specifications it is sent to wafer sort testing.
Samples from each circuit family are periodically chosen for Wafer Level Reliability (WLR) testing. WLR is a suite of accelerated tests done at the wafer level to predict the long-term performance of the parts produced on the wafer. The tests are done on special arrays of test devices, allowing characterization of the wafer without harm to the actual circuits. The suite consists of three types of testing:
- Hot Carrier Injection (HCI)
- Electromigration (EM) tests
- Oxide integrity tests
HCI testing runs transistors at elevated voltages, samples the device at prescribed intervals, and measures the change in a particular device parameter, e.g., threshold voltage. This is done for many transistors over a range of voltages to gather a statistically valid sample from which the transistor lifetime can be extrapolated. EM testing uses voltage and current to induce self-heating of metal lines and contacts. The elevated temperature and voltage cause changes in resistance, and lifetime is extrapolated from many samples stressed at varying temperatures. Oxide integrity stresses a gate oxide to failure by ramping the voltage and recording the voltage, current, and accumulated charge at breakdown. The minimum acceptable value for each parameter has been identified by extensive prior testing and is part of the pass/fail specification.
Wafer sort testing is done as required to reject any die which may contain a defect prior to assembly into the final package. This testing includes both functional operation and part specific parametric screening tests (probing) of the application circuits. Wafer maps are generated based on probing results for feedback to process engineering for continuous improvement and yield enhancement.
The evaluation/characterization of the SRI Emulated device is performed using the same test procedures used to measure the original sample part. The high performance ATE (Automated Test Equipment) test programs developed to fully evaluate parametric and functional operation of the original sample part are used to characterize the emulated part, thereby ensuring all specified and critical aspects of the original device have been replicated. These test programs are customized to the precise and detailed requirements, including full temperature and voltage ratings, as contained in the customers procurement specification.
QML MIL-PRF-38535 Screening
SRI maintains in-house capability to perform the vast majority of qualification and screening tests with DLA issued lab suitability in conformance to the requirements for military grade microcircuits (MIL-STD-883). In addition to high performance digital ATE (up to 200Mb/sec and 416 pins with a vector depth of 8M), parametric testing over the mil spec temperature range (-55 oC to +125oC) and functional wafer probing, the installed test and screening equipment provides the ability to perform: temperature cycling; constant acceleration; high temperature burn-in; helium leak test; ESD sensitivity classification; marking permanency; lead solderability; physical dimensions; thermal shock; mechanical shock; vibration; salt atmosphere; and lead finish adhesion. These tests are routinely performed in the qualification and production of emulated GEM microcircuits.
QML certified, internal wafer fabrication
- 5004 visual inspection, temp cycle, constant acceleration, fine leak and gross leak
5004 pre-burn in electrical test, burn in, post-burn-in electrical test
5005 Groups A, B every lot
5005 Groups C, D from data per MIL-PRF-38535/MIL-STD-883 requirements