Department of Defense requirements for microcircuits, particularly custom Application Specific Integrated Circuits (ASICs), are inhibited by unavailable or incomplete Technical Data Packages (TDPs). Even where documentation exists, it seldom contains the detailed information necessary to ensure a first-pass design success. In many cases, the only existing “data” is the packaged integrated circuit (IC). The Emulation process begins with "reverse engineering" (RE) the original device. This includes reviewing any existing documentation, electrical probing of the original circuit (Electrical RE), and physically inspecting the original part through careful delayering and high-resolution imaging (Physical RE).
Document reviews include a thorough review of the detailed Government documents (Standard Military Drawing or slash sheet) or customer's component specification (e.g. Source Controlled Drawing) in addition to the original manufacturer's published data. The more information that is available will help to reduce overall development time and increase the chance of first pass success.
Electrical Reverse Engineering
A known good, working, original part is electrically tested both functionally and for every specified electrical parameter using sophisticated ATE (Automatic Test Equipment) or traditional bench-top instrumentation when required. Any ambiguities may require additional tests as specified by design engineer.
The resulting measurements of this original device are reviewed relative to the specification requirements and used as a baseline for the detailed design of the emulation circuit. Our electrical testing capabilities are listed below:
Capability to test from -40 V up to 80V Bipolar and CMOS based ICs:
- Logic Families: TTL multiple generations, ECL
- Memories: Static RAM, Read Only Memories (ROM)
- Programmable Devices: PLA’s, PLD’s, FPGA’s, etc.
- Digital LSI: Large pin count Microprocessors, Microcontrollers, and ASICs
Capability to test up to 180V linear ICs:
- Operational Amplifiers
- Voltage Regulators
- Voltage References
|Bench Testing||Combination of manual and semi-automated test routines to characterize non-trivial functional or performance parameters|
|Other||ESD and Latchup characterization|
|Full Mil Spec Temperature Capability||
-55°C to +125°C temperature conditioning and control at DUT
Used on both ATE and bench tests
All specified parameters measured over full temperature range
Physical Reverse Engineering
SRI has developed and demonstrated a physical reverse engineering capability for complex ICs. This reverse engineering process involves removing the silicon die from the package and carefully “deprocessing” the IC layer-by-layer and capturing each circuit layer with optical and electron-beam microscopy. Pattern recognition algorithms and image analysis techniques are then used to regenerate the original mask information used to manufacture the IC. CAD design rule and schematic verification software are then utilized to extract a component level netlist from the mask data. This is used to recreate the design specification necessary to emulate the IC using GEM/AME technology and design libraries. SRI has the capability to derive netlists, schematics, and higher order design information directly from silicon die without additional technical data.
The procedures developed in the Microcircuit Emulation programs provide accurate and efficient reverse engineering ensuring microcircuit conformance with all specifications within procurement documents. The GEM program supports the Warfighter provides a long term supply of obsolete microcircuits to DoD systems.