Reverse Engineering

  • The Emulation process begins with reverse engineering the device and includes
    • Reviewing any existing documentation
    • Electrical testing of the circuit (Electrical reverse engineering)
    • Physically inspecting the part through careful delayering and high-resolution imaging (Physical reverse engineering)

Document Review

  • Review of the detailed Government and manufacturers’ documentation, such as:
    • Standard Microcircuit Drawing or slash sheet
    • Customer’s component specification (e.g. Source Control Drawing, manufacturer’s published data)
    • The more information that is available will help to reduce overall development time and increase the chance of first pass success
  • Unavailable or incomplete Technical Data Packages (TDPs) can make Emulation of obsolete microcircuits that support Department of War (DOW) systems challenging
    • Existing documentation may not contain all the information required to provide a first-pass form, fit, function Emulation
    • In many cases, the only existing “data” is the packaged microcircuit and may require physical reverse engineering to recover the missing data

Electrical Reverse Engineering

  • Electrically testing of known-good, working, parts using Automatic Test Equipment (ATE) or bench-top instrumentation including functional testing of all specified electrical parameters
  • Additional tests may be required to resolve ambiguities
  • Test results are reviewed relative to the documented specification and used as a baseline for the detailed design of the emulation circuit

The Microcircuit Emulation Center’s electrical testing capabilities are listed below:

Digital ATE
  • Capability to test from -40 V up to 80 V Bipolar and CMOS based ICs:
    • Logic Families: Transistor-Transistor Logic (TTL) multiple generations, Emitter-coupled logic (ECL)
    • Memories: Static Randon Access (SRAM), Read Only Memories (ROM)
    • Programmable Devices: Programmable Logic Array (PLA), Programmable Logic Device (PLD), Field Programmable Gate Array (FPGA), etc.
    • Digital Large Scale Integration (LSI): Large pin count Microprocessors, Microcontrollers, and Application Specific Integrated Circuits (ASIC)
Analog ATE

Capability to test up to 180 V linear ICs:

Operational Amplifiers, Comparators, Switches, Muxes, and Voltage Regulators and References
Bench Testing Combination of manual and semi-automated test routines to characterize non-trivial functional or performance parameters
Other ESD and latch up characterization
Environmental Conditioning & Testing

-55 °C to +125 °C ambient temperature conditioning used on both ATE and bench tests

All specified parameters measured over full military temperature range

Physical Reverse Engineering

  • Microcircuit design information is recovered by
    • Removing the silicon die from the package
    • Carefully striping back the microcircuit layer-by-layer
    • Imaging each circuit layer with optical and electron-beam microscopy
    • Image analysis to recreate the mask information used to manufacture the microcircuit
  • Captured information is used to derive netlists, schematics, and higher order design information directly from silicon die which is not available from the technical data package
Physical reverse engineering steps: remove circuit, prepare sample, capture layer-by-layer images, recreate layer data and cell library design, and extract a netlist.

Ensuring Compliance

  • Reverse engineering procedures, developed by the Microcircuit Emulation programs, provide accurate and efficient reverse engineering ensuring microcircuit conformance with all specifications within procurement documents
  • The Emulation Programs support the Warfighter and provide a long-term supply of unavailable microcircuits for weapon systems